JPH0370378B2 - - Google Patents

Info

Publication number
JPH0370378B2
JPH0370378B2 JP62078713A JP7871387A JPH0370378B2 JP H0370378 B2 JPH0370378 B2 JP H0370378B2 JP 62078713 A JP62078713 A JP 62078713A JP 7871387 A JP7871387 A JP 7871387A JP H0370378 B2 JPH0370378 B2 JP H0370378B2
Authority
JP
Japan
Prior art keywords
substrate bias
potential
generation circuit
transistor
input protection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62078713A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63244872A (ja
Inventor
Kazuyuki Uchida
Yukihiro Saeki
Hiroaki Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Priority to JP62078713A priority Critical patent/JPS63244872A/ja
Publication of JPS63244872A publication Critical patent/JPS63244872A/ja
Publication of JPH0370378B2 publication Critical patent/JPH0370378B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP62078713A 1987-03-31 1987-03-31 半導体入力保護装置 Granted JPS63244872A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62078713A JPS63244872A (ja) 1987-03-31 1987-03-31 半導体入力保護装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62078713A JPS63244872A (ja) 1987-03-31 1987-03-31 半導体入力保護装置

Publications (2)

Publication Number Publication Date
JPS63244872A JPS63244872A (ja) 1988-10-12
JPH0370378B2 true JPH0370378B2 (en]) 1991-11-07

Family

ID=13669510

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62078713A Granted JPS63244872A (ja) 1987-03-31 1987-03-31 半導体入力保護装置

Country Status (1)

Country Link
JP (1) JPS63244872A (en])

Also Published As

Publication number Publication date
JPS63244872A (ja) 1988-10-12

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